发明名称 半導体装置および半導体装置の製造方法
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device capable of reducing a cell size without need of consideration in variations in processing dimensions of a tunnel window and a select gate, and alignment accuracy of the select gate, and to provide a manufacturing method therefor.SOLUTION: A manufacturing method for a semiconductor device 1 selectively provided with a nonvolatile memory cell 7 on a semiconductor substrate 2 comprises the steps of: selectively forming a select gate 19 in an active region 5 for the nonvolatile memory cell 7 on a gate insulating film 23; forming an n-type tunnel diffusion layer 11 by introducing an impurity with respect to the select gate 19 in a self-alignment manner; and removing a part of the gate insulating film 23 with respect to the select gate 19 in the self-alignment manner and then forming a tunnel window 25 by thermal oxidation.
申请公布号 JP5982701(B2) 申请公布日期 2016.08.31
申请号 JP20110256715 申请日期 2011.11.24
申请人 ローム株式会社 发明人 関口 勇士
分类号 H01L21/8247;H01L21/336;H01L27/10;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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