TECHNIQUE FOR CONTROLLING POSITIONS OF STACKED DIES
摘要
An assembly component and a technique for assembling a chip package using the assembly component are described. This chip package includes a set of semiconductor dies that are arranged in a stack in a vertical direction, which are offset from each other in a horizontal direction to define a stepped terrace at one side of the vertical stack. Moreover, the chip package may be assembled using the assembly component. In particular, the assembly component may include a pair of stepped terraces that approximately mirror the stepped terrace of the chip package and which provide vertical position references for an assembly tool that positions the set of semiconductor dies in the vertical stack during assembly of the chip package.
申请公布号
EP3061131(A1)
申请公布日期
2016.08.31
申请号
EP20140783730
申请日期
2014.09.24
申请人
ORACLE INTERNATIONAL CORPORATION
发明人
DAYRINGER, MICHAEL, H., S.;HOPKINS, R., DAVID;CHOW, ALEX