| 摘要 |
Control of a plurality of electronically commutated motors is effected using a control unit and a power unit. The power unit enables the provision of commutation signals to each controlled motor. The control unit comprises a Digital Signal Processor (DSP) and a Field Programmable Gate Array (FPGA). An input memory of the FPGA is mapped to the DSP. In use, the DSP determines motor repositioning signals, on the basis of a received motor position demand signal describing demanded motor positions and the encoded motor position data, and loads the motor repositioning signals into the input memory of the FPGA. The FPGA is operable to generate motor driving current signals for driving the motors into the demanded motor positions, on the basis of the motor repositioning signals and motor phase current samples collected by the power unit, and to output the motor driving current signals to the power unit. |
