| 摘要 |
When an access from a virtual machine to a VGA is detected, a table managing identification information of a bridge on each path from a CPU to each VGA and passage setting information indicating whether or not to permit the passage of each path is referred to, and table information and a state of each bridge are set such that the passage of the path from the CPU to an SVGA to be accessed by the corresponding virtual machine is permitted, and the access is executed. Therefore, collision of I/O addresses can be avoided while maintaining the state of connecting a plurality of VGAs with fixed I/O addresses to a plurality of virtual machines. |
