| 摘要 |
A circuit structure in a gate side fan-out region comprises a first transistor (T1). A gate is connected to a first input end (A), a drain and a source are connected to a second input end (B) and an Nth-level gate scanning line (N) respectively. A first terminal (1) of a first circuit module is connected to the first input end (A), a second terminal (2) of the first circuit module is connected to the second input end (B), and a third terminal (3) of the first circuit module is connected to an (N+1)th-level gate scanning line (N+1). A first terminal (1) and a second terminal (2) of a second circuit module are connected to the second input end (B), and a third terminal (3) of the second circuit module is connected to the Nth-level gate scanning line (N). A first terminal (1) and a second terminal (2) of a third circuit module are connected to the second input end (B), and a third terminal (3) of the third circuit module is connected to the (N+1)th-level gate scanning line (N+1). A periodical square wave is input from the first input end (A), and a gate scanning signal is input from the second input end (B). The circuit structure can greatly reduce costs of a G-COF chip. |
