发明名称 積層型インダクタ
摘要 PROBLEM TO BE SOLVED: To provide a laminated inductor capable of suppressing generation of delamination.SOLUTION: A laminated inductor, in a planar view, comprises: first regions where a plurality of electrodes on an outermost layer overlap with coil conductors; and second regions where the plurality of electrodes do not overlap with the coil conductors. Dummy electrodes or dummy vias are arranged on a layer deeper, apart from the outermost layer in a thickness direction of the laminated inductor, than the electrodes located at the deepest positions in the second regions. The dummy electrodes are not electrically connected to the electrodes. Each of the dummy vias has one end which is electrically connected to the electrode and the other end which is connected with nothing.
申请公布号 JP5978915(B2) 申请公布日期 2016.08.24
申请号 JP20120231947 申请日期 2012.10.19
申请人 株式会社村田製作所 发明人 横山 智哉;家田 章弘
分类号 H01F17/00;H01F41/04 主分类号 H01F17/00
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