发明名称 |
Area efficient neuromorphic circuits |
摘要 |
A neuromorphic circuit includes a first field effect transistor in a first diode configuration establishing an electrical connection between a first gate and a first drain of the first field effect transistor. The neuromorphic circuit also includes a second field effect transistor in a second diode configuration establishing an electrical connection between a second gate and a second drain of the second field effect transistor. The neuromorphic circuit further includes variable resistance material electrically connected to both the first drain and the second drain, where the variable resistance material provides a programmable resistance value. The neuromorphic circuit additionally includes a first junction electrically connected to the variable resistance material and providing a first connection point to an output of a neuron circuit, and a second junction electrically connected to the variable resistance material and providing a second connection point to the output of the neuron circuit. |
申请公布号 |
GB2487636(B) |
申请公布日期 |
2016.08.17 |
申请号 |
GB20120000716 |
申请日期 |
2010.08.25 |
申请人 |
International Business Machines Corporation |
发明人 |
Matthew Joseph Breitwisch;Chung Hon Lam;Bipin Rajendran;Dharmendra Shantilal Modha |
分类号 |
G06N3/063;G11C11/54;H01L27/28 |
主分类号 |
G06N3/063 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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