发明名称 VOLATILE MEMORY ARCHITECTURE IN NON-VOLATILE MEMORY DEVICES AND RELATED CONTROLLERS
摘要 In some embodiments, one register of a non-volatile memory can be used for read operations and another register of the non-volatile memory can be used for programming operations. For instance, a cache register of a NAND flash memory can be used in connection with read operations and a data register of the NAND flash memory can be used in connection with programming operations. Data registers of a plurality of non-volatile memory devices, such as NAND flash memory devices, can implement a distributed volatile cache (DVC) architecture in a managed memory device, according to some embodiments. According to certain embodiments, data can be moved and/or swapped between registers to perform certain operations in the non-volatile memory devices without losing the data stored while other operations are performed.
申请公布号 EP3053168(A1) 申请公布日期 2016.08.10
申请号 EP20140849641 申请日期 2014.09.22
申请人 MICRON TECHNOLOGY, INC. 发明人 CONFALONIERI, EMANUELE;MINOPOLI, DIONISIO
分类号 G11C16/06;G11C16/34 主分类号 G11C16/06
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