发明名称 ORDERING UPDATES FOR NONVOLATILE MEMORY ACCESSES
摘要 Examples relate to ordering updates for nonvolatile memory accesses. In some examples, a first update that is propagated from a write-through processor cache of a processor is received by a write ordering buffer, where the first update is associated with a first epoch. The first update is stored in a first buffer entry of the write ordering buffer. At this stage, a second update that is propagated from the write-through processor cache is received, where the second update is associated with a second epoch. A second buffer entry of the write ordering buffer is allocated to store the second update. The first buffer entry and the second buffer entry can then be evicted to non-volatile memory in epoch order.
申请公布号 WO2016122657(A1) 申请公布日期 2016.08.04
申请号 WO2015US13958 申请日期 2015.01.30
申请人 HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP 发明人 NALLI, SANKETH;VOLOS, HARIS;KEETON, KIMBERLY
分类号 G06F12/08 主分类号 G06F12/08
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