发明名称 A METHOD FOR REDUCING SPURIOUS FOR A CLOCK DISTRIBUTION SYSTEM
摘要 A method for reducing spurious for a clock distribution system, the method including a) providing a system controller, b) providing clock distribution system, c) inputting characteristics of the clock distribution system in advance of operation thereof, d) calculating an expected level of the integer boundary spurious as a function of a fractional offset value, e) selecting an integer boundary solution based on the fractional offset value being within a preferred predetermined region, and f) programming the master clock subsystem and the one or more fractional synthesizers with the integer boundary solution, and g) repeating steps d) through f) as needed.
申请公布号 EP2915248(A4) 申请公布日期 2016.08.03
申请号 EP20130852287 申请日期 2013.10.25
申请人 发明人 CLOUTIER, MARK
分类号 H03B21/00;G06F1/10;H03B19/12;H03L3/00;H03L7/183;H03L7/23 主分类号 H03B21/00
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