| 摘要 |
The present invention relates to a transient voltage suppressor and a manufacturing method thereof. An objective of the present invention is to provide a low-capacitance transient voltage suppressor and a manufacturing method thereof which form double buried layers of different conductivity types, and form an isolation area using a trench structure to allow bidirectional current passes in a single element. According to an embodiment of the present invention, the transient voltage suppressor comprises: a substrate of a first conductivity type; an epitaxial layer of the first conductivity type formed on an upper portion of the substrate; a first buried layer of a second conductivity type formed on a portion of an area between the substrate and the epitaxial layer; a second buried layer of the first conductivity type formed on a portion of an area between the first buried layer and the epitaxial layer; a first conductivity type area formed on a surface of the epitaxial layer; a second conductivity type area formed on the surface of the epitaxial layer; a first trench vertically formed from the surface of the epitaxial layer to the second buried layer to define a first element area including the first conductivity type area, the epitaxial layer, and the second buried layer; and a second trench vertically formed from the surface of the epitaxial layer to the second buried layer to define a second element area including the second conductivity type area, the epitaxial layer, and the first buried layer. |
