发明名称 半導体記憶装置、及び、半導体記憶装置の試験方法
摘要 A semiconductor storage device includes: a memory block which includes a plurality of memory cells that hold data; a selection circuit, which is a selection circuit that outputs a first selection signal which selects first column addresses, which are half among column addresses of a plurality of memory cells for the same bit, or a second selection signal which selects second column addresses, which are the remaining half, such that when writing test data to the plurality of memory cells, both the first selection signal and the second selection signal are output, and when writing normal data, either the first selection signal or the second selection signal is output; a first driver which, on the basis of write-data to be written to the memory cell, and the first selection signal, outputs the write data to first memory cells corresponding to the first column addresses among the plurality of memory cells for the same bit; and a second driver which, on the basis of the write-data and the second selection signal, outputs the write data to second memory cells corresponding to the second column addresses.
申请公布号 JP5954498(B2) 申请公布日期 2016.07.20
申请号 JP20150529244 申请日期 2013.07.29
申请人 富士通株式会社 发明人 村田 誠治
分类号 G11C29/34 主分类号 G11C29/34
代理机构 代理人
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