发明名称 Reducing reference frame data store bandwidth requirements in video decoders
摘要 A video processing apparatus, method and computer program are disclosed. The video processing apparatus comprises: first stage video processing circuitry for receiving a bitstream of compressed encoded video data representing a plurality of frames of video data and configured to perform one or more processing operations on the input compressed video data; analyzing circuitry configured to analyze the processed bitstream and to determine for at least one of the plurality of frames at least one portion of the at least one frame that is not required in the decoding of other frames and to generate at least one indicator indicating the at least one portion. The frame reconstruction processing circuitry is configured to perform frame reconstruction on the compressed encoded video data and to receive the at least one indicator and to generate at least one partial reference frame for use in decoding other frames from the bitstream and the at least one indicator, the frame reconstruction processing circuitry being configured to determine from the at least one indicator the at least one portion that is not required for decoding other frames and to generate the partial reference frame as a frame that does not include the at least one portion and to output the partial reference frame for use in decoding the other frames.
申请公布号 GB2483342(B) 申请公布日期 2016.07.13
申请号 GB20110014294 申请日期 2011.08.19
申请人 ARM Limited 发明人 Andreas Bjorklund;Ola Hugosson
分类号 H04N19/44;H04N19/423 主分类号 H04N19/44
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