发明名称 共通基板上にカラムIII−VトランジスタとともにシリコンCMOSトランジスタを有する半導体構造
摘要 A semiconductor structure having: a silicon substrate having a crystallographic orientation; an insulating layer disposed over the silicon substrate; a silicon layer having a different crystallographic orientation than the crystallographic orientation of the substrate disposed over the insulating layer; and a column III-V transistor device having the same crystallographic orientation as the substrate disposed on the silicon substrate. In one embodiment, the column III-V transistor device is in contact with the substrate. In one embodiment, the device is a GaN device. In one embodiment, the crystallographic orientation of the substrate is <111> and wherein the crystallographic orientation of the silicon layer is <100>. In one embodiment, CMOS transistors are disposed in the silicon layer. In one embodiment, the column III-V transistor device is a column III-N device. In one embodiment, a column III-As, III-P, or III-Sb device is disposed on the top of the <100> silicon layer.
申请公布号 JP5950983(B2) 申请公布日期 2016.07.13
申请号 JP20140237805 申请日期 2014.11.25
申请人 レイセオン カンパニー 发明人 ホーク,ウィリアム・イー;ラロシュ,ジェフリー・アール
分类号 H01L21/8238;H01L21/02;H01L21/338;H01L21/76;H01L21/762;H01L21/764;H01L21/8234;H01L27/06;H01L27/08;H01L27/092;H01L27/095;H01L27/12;H01L29/778;H01L29/812 主分类号 H01L21/8238
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