发明名称 半導体装置
摘要 To provide a memory device which can perform verification operation for detecting a memory cell whose data holding time is shorter than a predetermined length, accurately in a short time. Each memory cell includes at least a first capacitor, a second capacitor, and a transistor which functions as a switching element for controlling supply, storage, and release of charge in the first capacitor and the second capacitor. The capacitance of the first capacitor is thousand or more times the capacitance of the second capacitor, preferably ten thousand or more times the capacitance of the second capacitor. In normal operation, charge is stored using the first capacitor and the second capacitor. In performing verification operation for detecting a memory cell whose data holding time is shorter than a predetermined length, charge is stored using the second capacitor.
申请公布号 JP5951259(B2) 申请公布日期 2016.07.13
申请号 JP20120001853 申请日期 2012.01.10
申请人 株式会社半導体エネルギー研究所 发明人 齋藤 利彦
分类号 G11C11/405;H01L21/8242;H01L27/108;H01L29/786 主分类号 G11C11/405
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