发明名称 |
MEMORY CONTROLLER AND METHOD FOR INTERLEAVING DRAM AND MRAM ACCESSES |
摘要 |
A memory controller and method for interleaving volatile and non-volatile memory different latencies and page sizes are described wherein a single DDR3 memory controller communicates with a number of memory modules comprising of at least non-volatile memory, e.g., spin torque magnetic random access memory, integrated in a different Rank or Channel with a volatile memory, e.g., dynamic random access memory (DRAM). |
申请公布号 |
EP2652741(A4) |
申请公布日期 |
2016.07.06 |
申请号 |
EP20110847949 |
申请日期 |
2011.12.16 |
申请人 |
EVERSPIN TECHNOLOGIES, INC. |
发明人 |
ALAM, SYED M.;ANDRE, THOMAS;GOGL, DIETMAR |
分类号 |
G11C16/04;G06F13/16 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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