发明名称 無線通信装置
摘要 PROBLEM TO BE SOLVED: To reduce the power consumption of a radio communication apparatus using a frequency signal by a frequency synthesizer.SOLUTION: In the radio communication apparatus, a receiving section includes a first mixer for mixing a signal based on a received radio signal with a frequency signal, a second mixer for mixing an output of the first mixer with a local signal, and a demodulation stage for demodulating an output of the second mixer to generate a demodulation signal, a frequency synthesizer comprises a VCO for generating the frequency signal of a frequency responsive to a fluctuation in a control input voltage, and a feedback circuit for producing as the control input voltage a voltage depending on a phase difference between a signal obtained by frequency dividing an output frequency signal of the VCO and a reference clock signal, and the VCO is a variable frequency oscillator operable at a higher frequency with increasing bias current and the bias current is controlled in accordance with a mode designation.
申请公布号 JP5947934(B2) 申请公布日期 2016.07.06
申请号 JP20150030657 申请日期 2015.02.19
申请人 ラピスセミコンダクタ株式会社 发明人 太矢 隆士
分类号 H03L7/187;H03L7/099;H04B1/50 主分类号 H03L7/187
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