发明名称 Method and apparatus to protect a processor against excessive power
摘要 In an embodiment, a processor includes at least a first core. The first core includes execution logic to execute operations, and a first event counter to determine a first event count associated with events of a first type that have occurred since a start of a first defined interval. The first core also includes a second event counter to determine a second event count associated with events of a second type that have occurred since the start of the first defined interval, and stall logic to stall execution of operations including at least first operations associated with events of the first type, until the first defined interval is expired responsive to the first event count exceeding a first combination threshold concurrently with the second event count exceeding a second combination threshold. Other embodiments are described and claimed.
申请公布号 EP2819008(A3) 申请公布日期 2016.07.06
申请号 EP20140171643 申请日期 2014.06.09
申请人 INTEL CORPORATION 发明人 MAKOVSKY, LEV;SPERBER, ZEEV;ROTEM, EFRAIM;ROSENZWEIG, NIR;SHWARTSMAN, STANISLAV;SADE, RAANAN;YANOVER, IGOR;BERGER, GAVRI;WEINER, TOMER;GABOR, RON
分类号 G06F9/48;G06F1/32;G06F9/30 主分类号 G06F9/48
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