| 发明名称 |
OPERATION PROCESSING APPARATUS AND METHOD |
| 摘要 |
An operation processing apparatus is provided. The operation processing apparatus includes a vector operator and cores. The vector operator processes a vector operation with respect to an instruction that uses the vector operation, and each core includes a scalar operator that processes a scalar operation with respect to an instruction that does not use the vector operation. The vector operator is shared by the cores. |
| 申请公布号 |
US2016188531(A1) |
申请公布日期 |
2016.06.30 |
| 申请号 |
US201514757586 |
申请日期 |
2015.12.24 |
| 申请人 |
SAMSUNG ELECTRONICS CO., LTD. ;KWANGWOON UNIVERSITY INDUSTRY-ACADEMIC COLLABORATION FOUNDATION |
发明人 |
PARK Young-hwan;LEE Hyunseok;HONG Yonggeun;KIM Suk-jin |
| 分类号 |
G06F15/80;G06F9/30 |
主分类号 |
G06F15/80 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An operation processing apparatus comprising:
a vector operator configured to process a vector operation with respect to an instruction that uses the vector operation; and a plurality of cores, each core of the plurality of cores comprising a scalar operator configured to process a scalar operation with respect to an instruction that does not use the vector operation, wherein the vector operator is shared by the plurality of cores. |
| 地址 |
Suwon-si KR |
