发明名称 WIRING LAYER FORMING METHOD, WIRING LAYER FORMING SYSTEM AND RECORDING MEDIUM
摘要 A seed layer and a barrier layer located outside a wiring layer on a surface of a substrate are easily removed by an etching process. A metal layer 25 composed of the barrier layer 23 and the seed layer 24 is formed on a surface of the substrate 2 and on an inner surface of a recess 2a, and then, a resist pattern is formed on the metal layer. The wiring layer 27 is formed within the recess 2a by supplying a plating liquid from an opening 26a of the resist pattern 26, and then, the metal layer 25 on the surface of the substrate 2 is removed by the etching process. The metal layer 25 is formed by an electroless plating process.
申请公布号 US2016190040(A1) 申请公布日期 2016.06.30
申请号 US201514972623 申请日期 2015.12.17
申请人 Tokyo Electron Limited 发明人 Iwashita Mitsuaki;Tanaka Takashi
分类号 H01L23/48;H01L23/532;H01L21/768 主分类号 H01L23/48
代理机构 代理人
主权项 1. A wiring layer forming method of forming a wiring layer on a substrate, comprising: preparing the substrate having a recess; forming, on a surface of the substrate and on an inner surface of the recess, a metal layer composed of a barrier layer and a seed layer; forming, on the metal layer, a resist pattern having an opening which surrounds the recess; forming a wiring layer within the recess by a plating process in which a plating liquid is supplied from the opening of the resist pattern; and removing the metal layer, among the metal layer on the substrate, located outside the wiring layer by an etching process, wherein the seed layer of the metal layer is formed by an electroless plating process.
地址 Tokyo JP