NON-VOLATILE STATIC RANDOM ACCESS MEMORY (NVSRAM)

摘要

A nonvolatile memory device includes a shared port block, a plurality of decoded address signals, a read signal, and a read word line. The shared port block includes a shared port communicatively coupled to a block, the block comprising a plurality of memory cells, wherein the shared port is operable to sense a voltage level at each of the plurality of memory cells. The plurality of decoded address signals are communicatively coupled to the block. Each of the plurality of decoded address signals is operable to enable a corresponding one of the plurality of memory cells. The read signal is communicatively coupled to the shared port. The read signal is operable to enable a read operation associated with the block. The read word line signal is communicatively coupled to the shared port block. The read word line signal is operable to enable the read operation.

主权项

1. A nonvolatile memory device comprising:
a shared port block comprising a shared port communicatively coupled to a block, the block comprising a plurality of memory cells, wherein the shared port is operable to sense a voltage level at each of the plurality of memory cells; a plurality of decoded address signals communicatively coupled to the block, each of the plurality of decoded address signals operable to enable a corresponding one of the plurality of memory cells; a read signal communicatively coupled to the shared port, the read signal operable to enable a read operation associated with the block; and a read word line signal communicatively coupled to the shared port block, the read word line signal operable to enable the read operation.