发明名称 Resistive Memory Cell Having A Reduced Conductive Path Area
摘要 A method of forming a resistive memory cell, e.g., a CBRAM or ReRAM, may include forming a bottom electrode layer, oxidizing an exposed region of the bottom electrode layer to form an oxide region, removing a region of the bottom electrode layer proximate the oxide region, thereby forming a bottom electrode having a pointed tip region adjacent the oxide region, and forming an electrolyte region and top electrode over at least a portion of the bottom electrode and oxide region, such that the electrolyte region is arranged between the pointed tip region of the bottom electrode and the top electrode, and provides a path for conductive filament or vacancy chain formation from the pointed tip region of the bottom electrode to the top electrode when a voltage bias is applied to the memory cell. A memory cell and memory cell array formed by such method are also disclosed.
申请公布号 US2016190442(A1) 申请公布日期 2016.06.30
申请号 US201615065354 申请日期 2016.03.09
申请人 Microchip Technology Incorporated 发明人 Fest Paul;Walls James
分类号 H01L45/00;H01L27/24 主分类号 H01L45/00
代理机构 代理人
主权项
地址 Chandler AZ US