发明名称 |
FINFET DEVICE WITH A SUBSTANTIALLY SELF-ALIGNED ISOLATION REGION POSITIONED UNDER THE CHANNEL REGION |
摘要 |
One illustrative device disclosed herein includes, among other things, a semiconductor substrate, a fin structure, a gate structure positioned around a portion of the fin structure in the channel region of the device, spaced-apart portions of a second semiconductor material positioned vertically between the fin structure and the substrate, wherein the second semiconductor material is a different semiconductor material than that of the fin, and a local channel isolation material positioned laterally between the spaced-apart portions of the second semiconductor material and vertically below the fin structure and the gate structure, wherein the local channel isolation material is positioned under at least a portion of the channel region of the device. |
申请公布号 |
US2016190306(A1) |
申请公布日期 |
2016.06.30 |
申请号 |
US201615063633 |
申请日期 |
2016.03.08 |
申请人 |
GLOBALFOUNDRIES Inc. |
发明人 |
Xie Ruilong;Kamineni Vimal K.;Bello Abner F.;LiCausi Nicholas V.;Wang Wenhui;Wedlake Michael;Cantone Jason R. |
分类号 |
H01L29/78;H01L29/10;H01L29/51;H01L29/06 |
主分类号 |
H01L29/78 |
代理机构 |
|
代理人 |
|
主权项 |
1. A FinFET device comprising a channel region and a plurality of source/drain regions, said device having a gate-length direction that corresponds to a direction of current travel when said device is operational, the device comprising:
a semiconductor substrate; a fin structure that is positioned vertically above said substrate, said fin structure being comprised of a first semiconductor material; a gate structure positioned around a portion of said fin structure in said channel region of said device, said fin structure extending in said gate-length direction across said channel region and said source/drain regions for said device; spaced-apart portions of a second semiconductor material positioned vertically between said fin structure and said substrate, said second semiconductor material being a different semiconductor material than said first semiconductor material; and a local channel isolation material positioned laterally between said spaced-apart portions of said second semiconductor material and vertically below said fin structure and said gate structure, said local channel isolation material being positioned under at least a portion of said channel region of said device. |
地址 |
Grand Cayman KY |