METHOD FOR FABRICATING LIGHTLY DOPED DRAIN AREA, THIN FILM TRANSISTOR AND ARRAY SUBSTRATE

摘要

Embodiments of the disclosure provide a method for fabricating a lightly doped drain area, a thin film transistor, and a thin film transistor array substrate. In an embodiment of the disclosure, a poly-silicon layer, a gate insulation layer, and a gate metal layer are formed in sequence on a substrate; the gate metal layer is patterned to form a gate electrode; the gate insulation layer is etched to form a stepped structure, wherein a width of the gate electrode is smaller than a width of the stepped structure, and an edge of the stepped structure is not covered by the gate electrode; and the poly-silicon layer is doped by an ion doping process using the gate electrode and the gate insulation layer with the stepped structure as a mask to form both a lightly doped area and a heavily doped area.

主权项

1. A method for fabricating a lightly doped area, the method comprising:
forming a poly-silicon layer, a gate insulation layer, and a gate metal layer in sequence on a substrate; patterning the gate metal layer to form a gate electrode; etching the gate insulation layer to form a stepped structure, wherein a width of the gate electrode is smaller than a width of the stepped structure, and an edge of the stepped structure is not covered by the gate electrode; and doping the poly-silicon layer by a doping process using the gate electrode and the gate insulation layer with the stepped structure as a mask to form a lightly doped area and a heavily doped area.