| 摘要 |
Disclosed is a device, which may be used for processing image data from a pixel array, comprising multiple data pathways or pipelines. The multiple data pathways, P0, P1, can be configured in a parallel arrangement to enable pixel data to read out concurrently. A first data pathway receives image data from a first plurality of pixels whilst a second data pathway receives image data from a second plurality of pixels. The first plurality of pixels include a number of pixels that are also included in the second plurality of pixels, Tovlp_pix. Consequently the device includes a number of shared pixels that are present in both the first and second plurality of pixels. The shared pixels may be used to enable kernel image processing to be performed by ensuring that each data pathway includes neighbouring pixel data for the pixels at the beginning and end of the each data pathway. This may be achieved by buffering the image information such that information relating to the shared pixels is buffered in parallel to the information relating to the first and second plurality of pixels. |
