NITRIDE-BASED TRANSISTOR HAVING DISLOCATION PREVENTING PATTERN LAYER
摘要
A nitride-based transistor according to one embodiment comprises: a first nitride-based first semiconductor pattern layer doped as a N type; a gate dielectric layer and gate electrode layer which are consecutively located on an upper surface of the first semiconductor pattern layer; a first nitride-based second semiconductor pattern layer doped as the N type located on a lower surface of the first semiconductor pattern layer; an inhibiting insulating dislocation pattern layer located on a lower part of the first semiconductor pattern layer to surround the second semiconductor pattern layer; and a first nitride-based third semiconductor pattern layer doped as the N type surrounding the inhibiting insulating dislocation pattern layer. When the nitride-based transistor is turned on, a carrier is conducted from the second semiconductor pattern layer to the third semiconductor pattern layer through a conductive channel formed within the first semiconductor pattern layer between the gate electrode layer and the inhibiting dislocation pattern layer.
申请公布号
KR20160072515(A)
申请公布日期
2016.06.23
申请号
KR20140180227
申请日期
2014.12.15
申请人
SEOUL SEMICONDUCTOR CO., LTD.
发明人
TAKEYA MOTONOBU;LEE, KWAN HYUN;LEE, JONG IK;KIM, EUN HEE