发明名称 SAMPLE AND HOLD CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a sample and hold circuit, capable of avoiding aliasing of its output signal even if noise is added to power supply.SOLUTION: A constant current generation part 151 generates a constant current according to the value of a resister 151b, based on a power supply voltage of a power supply 200. A frequency detection part 153 detects if noise is added to the power supply 200 or not. A variable resister part 154 changes an amount of current flowing through the resister 151b by draining a part of current flowing through the resistor 151b, if noise is detected by the frequency detection part 153. Thus, an oscillation circuit part 152 changes a sample and hold period for a frequency signal. Therefore, the sample and hold period is changed from a frequency causing aliasing, if noise is added to the power supply 200, and aliasing of an output signal can be avoided.SELECTED DRAWING: Figure 1
申请公布号 JP2016116053(A) 申请公布日期 2016.06.23
申请号 JP20140252659 申请日期 2014.12.15
申请人 DENSO CORP 发明人 SUZUKI YOSHITAKA;ARIYOSHI HIROMI
分类号 H03K17/687;H03K5/1252 主分类号 H03K17/687
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