发明名称 Solder Joint Structure for Ball Grid Array in Wafer Level Package
摘要 A semiconductor device package and a method for forming the same using an improved solder joint structure are disclosure. The package includes solder joints having a thinner bottom portion than a top portion. The bottom portion is surrounded by a molding compound and the top portion is not surrounded by a molding compound. The method includes depositing and forming a liquid molding compound around an intermediate solder joint using release film, and then etching the molding compound to a reduced height. The resulting solder joint has no waist at the interface of the molding compound and the solder joint. The molding compound has a greater roughness after the etch, greater than about 3 microns, than the molding compound as formed.
申请公布号 US2016181219(A1) 申请公布日期 2016.06.23
申请号 US201615044032 申请日期 2016.02.15
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Hu Yu-Hsiang;Chen Wei-Yu;Lin Wei-Hung;Cheng Ming-Da;Liu Chung-Shi
分类号 H01L23/00;H01L23/31 主分类号 H01L23/00
代理机构 代理人
主权项 1. A package comprising: a package substrate; a semiconductor chip; an array of solder joints between the package substrate and the semiconductor chip, each solder joint having a bottom portion proximate to the semiconductor chip and a top portion proximate to the package substrate; and a molding compound surrounding the bottom portion, but not the top portion, of the solder joints, the molding compound having curvilinear surfaces extending between respective ones of the solder joints, wherein the top portion has a larger height than the bottom portion.
地址 Hsin-Chu TW