INSTRUCTION AND LOGIC FOR TRACKING ACCESS TO MONITORED REGIONS

摘要

A processor includes a front end, a decoder, a retirement unit, and a performance monitoring unit. The front end includes a decoder with logic to receive a tracking instruction to enable tracking of execution of a region of memory. The instruction is to define an address range of the region. The retirement includes logic to retire the tracking instruction and candidate instructions. The performance monitoring unit includes logic to determine that the candidate instructions are associated with an entrance and an exit to the address range, and to generate an alert based on the candidate instructions association with the entrance and the exit.

主权项

1. A processor, comprising:
a front end including a decoder, the decoder including a first logic to receive an tracking instruction to enable tracking of execution of a region of memory, the instruction to define an address range of the region; a retirement unit including a second logic to retire the tracking instruction, a first candidate instruction, and a second candidate instruction; and a performance monitoring unit, including
a third logic to filter instructions based upon the address range;a fourth logic to determine that the first candidate instruction is associated with an entrance to the address range;a fifth logic to determine that the second candidate instruction is associated with an exit to the address range; anda sixth logic to generate an alert based upon the association of the first candidate instruction with the entrance to the address range and upon the association of the second candidate instruction with the exit to the address range.