发明名称 |
STORAGE APPARATUS AND FAILURE LOCATION IDENTIFYING METHOD |
摘要 |
A storage apparatus has a redundant configuration equipped with a plurality of components and includes a first controller and second controller, wherein the first controller is provided with a first processor and a third processor for monitoring the first controller; wherein the second controller is provided with a second processor and a fourth processor for monitoring the second controller; wherein the first processor and the second processor are connected via a first path and the third processor and the fourth processor are connected via a second path; and wherein if a failure occurs at the first controller, the second processor blocks the first path, acquires failure information including a failure location of the first controller via the third processor, the fourth processor, and the second path, executes first failure location identifying processing, and notifies a management terminal of the failure location. |
申请公布号 |
US2016179641(A1) |
申请公布日期 |
2016.06.23 |
申请号 |
US201314357499 |
申请日期 |
2013.09.06 |
申请人 |
HITACHI, LTD. |
发明人 |
MAEDA Toru;MATSUBARA Ryosuke |
分类号 |
G06F11/20 |
主分类号 |
G06F11/20 |
代理机构 |
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代理人 |
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主权项 |
1. A storage apparatus comprising a first controller and second controller, which have a redundant configuration equipped with a plurality of components, for controlling data input to and output from a storage device,
wherein the first controller is provided with a first processor for controlling data input to and output from the storage device and a third processor for monitoring the first controller; wherein the second controller is provided with a second processor for controlling data input to and output from the storage device and a fourth processor for monitoring the second controller; wherein the first processor and the second processor are connected via a first path and the third processor and the fourth processor are connected via a second path; wherein the first processor and the second processor communicate with each other at normal time via the first path in response to a response from a host computer and execute processing for inputting and outputting data to and from the storage device; and wherein if a failure occurs at the first controller, the second processor blocks the first path, acquires failure information including a failure location of the first controller via the third processor, the fourth processor, and the second path, executes first failure location identifying processing, and notifies a management terminal of the failure location. |
地址 |
Tokyo JP |