INSTRUCTION AND LOGIC TO PERFORM AN INVERSE CENTRIFUGE OPERATION

摘要

In one embodiment a processing device implements a set of instructions to perform an inverse centrifuge operation using vector or general purpose registers. The inverse centrifuge operation interleaves bits from opposite regions of a source and writes the interleaved bits to a destination. The instructions use a control mask where each bit with a mask value of one is obtained from one side of the source register or vector elements with a mask of zero are obtained from the opposing side.

主权项

1. A processing apparatus comprising:
decode logic to decode a first instruction into a decoded first instruction including a first operand and a second operand; and an execution unit to execute the first decoded instruction to perform an inverse centrifuge operation to interleave bits from opposite regions of a source register specified by the second operand based on a control mask indicated by the first operand.