发明名称 Communication control device, information processing apparatus, parallel computer system, and control method for parallel computer system
摘要 An arithmetic processing device (601) executes a program, and gives first sequence information to a first start time when a first process included in the program starts a first interprocess communication. Then, the first start time and the first sequence information are written in a main storage device (602) . When second sequence information given to a second start time when a second process starts a second interprocess communication is newer than the first sequence information, an operation unit (411) in a communication control device (401) does not carry out an operation using the first start time. On the other hand, when the second sequence information corresponds to the first sequence information, the operation unit carries out an operation using the first start time and the second start time and outputs the operation result.
申请公布号 EP2879054(A3) 申请公布日期 2016.06.22
申请号 EP20140193404 申请日期 2014.11.17
申请人 FUJITSU LIMITED 发明人 MIWA, HIDEKI;MIYOSHI, IKUO
分类号 G06F9/54;G06F11/34 主分类号 G06F9/54
代理机构 代理人
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