MEMORY REPAIR REDUNDANCY

摘要

An integrated circuit including a memory, an array cache, and a cache replacement store is described. The memory includes a primary array and a redundant array. The integrated circuit also includes circuitry configured to transfer data into or out of the primary array using the array cache. For defective locations in the array cache, the circuitry is configured to use the cache replacement store in the transfer of data in place of the defective locations in the array cache, and map addresses in the primary array corresponding to the defective locations in the cache array to the redundant array.

主权项

1. An integrated circuit comprising:
a memory including a primary array and a redundant array; an array cache; and a cache replacement store; and circuitry configured to transfer data into or out of the primary array using the array cache, and for a defective location in the array cache, to use the cache replacement store in the transfer of the data in place of the defective location in the array cache.