| 发明名称 |
MEMORY DEVICE |
| 摘要 |
A device includes memory cells, reference memory cells, and a sensing unit. The reference memory cells are configured to store first bit data, second bit data, third bit data, and fourth bit data, in which the first bit data and the fourth bit data are configured to be a high logic state, and the second bit data and the third bit data are configured to be a low logic state. The sensing unit is configured to read bit data stored in one of the memory cells according to the first bit data, the second bit data, the third bit data, and the fourth bit data. |
| 申请公布号 |
US2016163380(A1) |
申请公布日期 |
2016.06.09 |
| 申请号 |
US201615016172 |
申请日期 |
2016.02.04 |
| 申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
LIN Tzu-Kuei;LIAO Hung-Jen;CHEN Yen-Huei |
| 分类号 |
G11C11/419 |
主分类号 |
G11C11/419 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A device, comprising:
a plurality of memory cells; a plurality of reference memory cells configured to store first bit data, second bit data, third bit data, and fourth bit data, wherein the first bit data and the fourth bit data are configured to be a high logic state, and the second bit data and the third bit data are configured to be a low logic state; and a sensing unit configured to read bit data stored in one of the memory cells according to the first bit data, the second bit data, the third bit data, and the fourth bit data. |
| 地址 |
Hsinchu TW |
