| 摘要 |
PROBLEM TO BE SOLVED: To provide a SiC field-effect transistor arranged so that the rise in on-resistance can be suppressed while keeping a good withstand voltage.SOLUTION: A SiC field-effect transistor 1 has a vertical type MIS transistor structure in which an Ntype source region 15 and an Ntype drift region 14 are disposed in a vertical direction perpendicular to a surface 12 (i.e. a principal plane) of an epitaxial layer 11 to be spaced part from each other through a P-type body region 13. In the vertical type MIS transistor structure, a source trench 5 is formed, extending from the surface 12 of the epitaxial layer 11 through the source region 15 and the body region 13 and reaching the drift region 14. In the structure, a source electrode 26 is in contact with the source region 15, a body contact region 16 and the drift region 14 in the source trench 5; and a hetero junction with a junction barrier lower than a diffusion potential of a body diode 32 is formed between the source electrode and the drift region 14.SELECTED DRAWING: Figure 2 |
