MEMORY DEVICE CONTAINING STRESS-TUNABLE CONTROL GATE ELECTRODES
摘要
A memory film and a semiconductor channel are formed within each memory opening that extends through a stack including an alternating plurality of insulator layers and sacrificial material layers. After formation of backside recesses through removal of the sacrificial material layers selective to the insulator layers, electrically conductive layers are formed in the backside recesses. Each electrically conductive layer includes a combination of a tensile- stress-generating metallic material and a compressive-stress-generating metallic material. The tensile-stress-generating metallic material may be ruthenium and the compressive-stress- generating metallic material may be tungsten. An anneal may be performed to provide an alloy of the compressive-stress-generating metallic material and the tensile-stress-generating metallic material.
申请公布号
WO2016085572(A1)
申请公布日期
2016.06.02
申请号
WO2015US53829
申请日期
2015.10.02
申请人
SANDISK TECHNOLOGIES, INC.
发明人
SHARANGPANI, RAHUL;MAKALA, RAGHUVEER S.;MATAMIS, GEORGE