DYNAMIC THREAD STATUS RETRIEVAL USING INTER-THREAD COMMUNICATION

摘要

A circuit arrangement and program product for dynamically providing a status of a hardware thread/hardware resource independent of the operation of the hardware thread/hardware resource using an inter-thread communication protocol. A master hardware thread may be configured to communicate status requests to associated slave hardware threads and/or hardware resources. Each slave hardware thread/hardware resource may be configured with hardware logic configured to automatically determine status information for the slave hardware thread/hardware resource and communicate a status response to the master hardware thread without interrupting processing of the slave hardware thread/hardware resource.

主权项

1. A circuit arrangement comprising:
an on-chip network; and a plurality of interconnected integrated processor blocks coupled to the on-chip network and arranged in a network on a chip (NOC) configuration, a first integrated processor block among the plurality of integrated processor blocks comprising:
a slave hardware thread;an inbox coupled to the slave hardware thread and configured to receive a status request from a master hardware thread disposed in a different integrated processor block; andstatus logic coupled to the inbox and configured to determine a status associated with the slave hardware thread and communicate a status response to the master hardware thread based at least in part on the status, wherein the status logic is configured to determine the status associated with the slave hardware thread without interrupting processing of the slave hardware thread.