发明名称 MEMORY DEVICE, SEMICONDUCTOR DEVICE, METHOD FOR PRODUCING MEMORY DEVICE, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
摘要 A method for producing a semiconductor device includes forming a fin-shaped semiconductor layer on a semiconductor substrate and a first pillar-shaped semiconductor layer, a second pillar-shaped semiconductor layer, and a contact line, the contact line extending in a direction perpendicular to a direction in which the fin-shaped semiconductor layer extends. A pillar-shaped phase-change layer and a lower electrode are formed overlying the first pillar-shaped semiconductor layer. A reset gate insulating film is formed so as to surround the pillar-shaped phase-change layer and the lower electrode and a reset gate is formed.
申请公布号 US2016155939(A1) 申请公布日期 2016.06.02
申请号 US201615019513 申请日期 2016.02.09
申请人 Unisantis Electronics Singapore Pte. Ltd. 发明人 MASUOKA Fujio;NAKAMURA Hiroki
分类号 H01L45/00 主分类号 H01L45/00
代理机构 代理人
主权项 1. A method for producing a semiconductor device, the method comprising: forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first insulating film around the fin-shaped semiconductor layer; forming a second insulating film around the fin-shaped semiconductor layer; depositing a first polysilicon on the second insulating film and planarizing the first polysilicon; forming a first resist pattern and etching the first polysilicon, the second insulating film, and the fin-shaped semiconductor layer to form a first pillar-shaped semiconductor layer, a first dummy gate composed of the first polysilicon, a second pillar-shaped semiconductor layer, and a second dummy gate composed of the first polysilicon; forming a fourth insulating film around the first pillar-shaped semiconductor layer, the second pillar-shaped semiconductor layer, the first dummy gate, and the second dummy gate; depositing a second polysilicon around the fourth insulating film and etching second polysilicon to leave the second polysilicon on side walls of the first dummy gate, the first pillar-shaped semiconductor layer, the second dummy gate, and the second pillar-shaped semiconductor layer to form a third dummy gate and a fourth dummy gate; after etching second polysilicon, forming a second diffusion layer in an upper portion of the fin-shaped semiconductor layer, in a lower portion of the first pillar-shaped semiconductor layer, and in a lower portion of the second pillar-shaped semiconductor layer; forming a fifth insulating film around the third dummy gate and the fourth dummy gate and etching the fifth insulating film to leave side walls formed of the fifth insulating film; forming a compound of a metal and a semiconductor in an upper portion of the second diffusion layer and depositing an interlayer insulating film and planarizing the interlayer insulating film to expose upper portions of the first dummy gate, the second dummy gate, the third dummy gate, and the fourth dummy gate, removing the first dummy gate, the second dummy gate, the third dummy gate, and the fourth dummy gate, the second insulating film and the fourth insulating film; forming a gate insulating film around the first pillar-shaped semiconductor layer, around the second pillar-shaped semiconductor layer, and on an inner side of the fifth insulating film; forming a second resist pattern and removing a portion of the gate insulating film which is located on a periphery of a bottom portion of the second pillar-shaped semiconductor layer and removing the portion of the gate insulating film; depositing a metal and etching back the metal to form a gate electrode and a gate line around the first pillar-shaped semiconductor layer and to form a contact electrode and a contact line around the second pillar-shaped semiconductor layer, wherein in the contact line extends a direction perpendicular to a direction in which the fin-shaped semiconductor layer extends; after depositing and etching back the metal, forming a second interlayer insulating film and planarizing the second interlayer insulating film to expose an upper portion of the first pillar-shaped semiconductor layer; forming a pillar-shaped phase-change layer and a lower electrode overlying the first pillar-shaped semiconductor layer; forming a reset gate insulating film so as to surround the pillar-shaped phase-change layer and the lower electrode; and forming a reset gate.
地址 Peninsula Plaza SG