发明名称 SYSTEM AND METHOD OF INTERFACING CO-PROCESSORS AND INPUT/OUTPUT DEVICES VIA A MAIN MEMORY SYSTEM
摘要 A system for interfacing with a co-processor or input/output device is disclosed. According to one embodiment, the system includes a computer processing unit, a memory module, a memory bus that connects the computer processing unit and the memory module, and a co-processing unit or input/output device, wherein the memory bus also connects the co-processing unit or input/output device to the computer processing unit.
申请公布号 EP2673713(A4) 申请公布日期 2016.06.01
申请号 EP20120744797 申请日期 2012.02.08
申请人 DIABLO TECHNOLOGIES INC. 发明人 TAKEFMAN, MICHAEL L.;AMER, MAHER;BADALONE, RICCARDO
分类号 G06F13/38;G06F11/10;G06F12/02;G06F12/06;G06F13/20;G06F13/42;G06F15/18;H03M13/05;H03M13/27 主分类号 G06F13/38
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