Three-dimensional memory devices containing memory stack structures with position-independent threshold voltage

摘要

The threshold voltage for vertical transistors in three-dimensional memory stack structures can be made independent of a lateral distance from a source region by forming a doped pocket region. The doped pocket region has the same conductivity type as a doped well that constitutes horizontal portions of the semiconductor channels that extend into the memory stack structures, and has a higher dopant concentration level than the doped well. The doped pocket region and a source region can be simultaneously formed by implanting p-type dopants and n-type dopants into a surface portion of the substrate underlying a backside contact trench. By selecting dopant species having different diffusion rates, the doped pocket region can surround the source region. The process parameters of the anneal process can be selected such that the interface between the dopant pocket region and the doped well underlies outermost memory stack structures.

主权项

1. A monolithic three-dimensional memory device comprising:
a stack of alternating layers comprising insulating layers and electrically conductive layers and located over a semiconductor region having a doping of a first conductivity type at a first dopant concentration level; a plurality of memory stack structures extending through the stack; a first backside contact via structure extending through the stack and laterally spaced from the plurality of memory stack structures; a source region underlying the first backside contact via structure and having a doping of a second conductivity that is the opposite of the first conductivity type; and a doped pocket region laterally surrounding the source region, having a doping of the first conductivity type at a second dopant concentration level that is higher than the first dopant concentration level, wherein an interface between the doped pocket region and the semiconductor region underlies at least one first memory stack structure among the plurality of memory stack structures.