发明名称 Method of producing a junction field-effect transistor (JFET)
摘要 The invention concerns a method for producing a field effect transistor having a trench gate comprising: —the forming (110) of at least one trench (11, 12, 13) in a semi-conductive substrate (1) having a first type of conductivity, said substrate comprising two opposing faces called front face and rear face, —the primary implantation (120) of ions having a second type of conductivity so as to implant each trench of the substrate to form an active gate area, —the depositing (160) of a layer of polycrystalline silicon having the second type of conductivity on the implanted active gate area, —the oxidation (160) of the layer of polycrystalline silicon, and —the metallization (180) of the substrate on the front and rear faces of same in order to form active source and drain areas.
申请公布号 US9356113(B2) 申请公布日期 2016.05.31
申请号 US201214426041 申请日期 2012.09.05
申请人 Institut National des Sciences Appliquees de Lyon;Université Claude Bernard Lyon 1;Centre National de la Recherche Scientifique (CNRS);Ecole Centrale De Lyon;Consejo Superior De Investigaciones Cienti{acute over (f)}icas (CSIC) 发明人 Tournier Dominique;Chevalier Florian;Godignon Philippe;Millan José
分类号 H01L29/66;H01L29/423;H01L21/04;H01L21/02;H01L29/808;H01L29/16;H01L29/20 主分类号 H01L29/66
代理机构 Lerner, David, Littenberg, Krumholz & Mentlik, LLP 代理人 Lerner, David, Littenberg, Krumholz & Mentlik, LLP
主权项 1. A manufacturing method of a field-effect transistor of trench gate type, comprising: formation of at least one trench in an active semi-conductive layer of a first type of conductivity of a substrate comprising two opposite faces called front face and rear face, primary implantation of ions having a second type of conductivity so as to implant each trench of the substrate to form an active gate region, deposit of a layer of poly-crystalline silicon of the second type of conductivity on the implanted active gate region, partial oxidation of the layer of poly-crystalline silicon to obtain an electrically insulating film of oxidized poly-crystalline silicon on a sub-layer of non-oxidized poly-crystalline silicon, the sub-layer of poly-crystalline silicon and the implanted area forming an active gate region, and metallization of the substrate on its front face to form an active source region, and metallization of the substrate on another face to form an active drain region, wherein the formation step comprises the sub-steps of: depositing a primary mask on the front face of the semiconductive substrate, the primary mask including a principal opening and two subsidiary openings, the dimensions of the principal opening being greater than the dimensions of the subsidiary openings,primary etching of the substrate through the principal opening to form a principal trench, and through the subsidiary openings to form two subsidiary trenches, the primary implantation step being done through the primary mask, wherein the method further comprises: a deposit step of a secondary etching mask on the front face of the substrate following the primary implantation step, said secondary etching mask including a secondary etching opening extending above the principal trench,a secondary etching step of the substrate through the secondary etching opening to form a secondary trench in the principal trench.
地址 FR