发明名称 Interconnectable ultrasound transducer probes and related methods and apparatus
摘要 Ultrasound devices and methods are described, including a repeatable ultrasound transducer probe having ultrasonic transducers and corresponding circuitry. The repeatable ultrasound transducer probe may be used individually or coupled with other instances of the repeatable ultrasound transducer probe to create a desired ultrasound device. The ultrasound devices may optionally be connected to various types of external devices to provide additional processing and image rendering functionality.
申请公布号 US9351706(B2) 申请公布日期 2016.05.31
申请号 US201414561504 申请日期 2014.12.05
申请人 Butterfly Network, Inc. 发明人 Rothberg Jonathan M.;Fife Keith G.;Sanchez Nevada J.;Ralston Tyler S.;Charvat Gregory L.;Corteville Gregory
分类号 A61B8/00;A61B8/13;A61B8/08;G03B27/42;G03B27/52;B06B1/02;G01S7/00;A61B8/14;A61N7/02;G01S7/52;G01S15/89;A61N7/00 主分类号 A61B8/00
代理机构 Wolf, Greenfield & Sacks, P.C. 代理人 Wolf, Greenfield & Sacks, P.C.
主权项 1. An apparatus, comprising: a semiconductor chip including a silicon substrate, a plurality of insulating layers formed on the silicon substrate, and a metal layer between two insulating layers of the plurality of insulating layers, wherein the metal layer is connected to the silicon substrate by a conductive via passing through an insulating layer of the plurality of insulating layers, the semiconductor chip having a device surface with a width and height, the width of the device surface being at least twice as large as the height of the device surface, the metal layer having a thickness between 0.5 microns and 10 microns, wherein the width, the height, and the thickness are orthogonal to each other; a plurality of complementary metal oxide semiconductor (CMOS) ultrasonic transducers integrated on the plurality of insulating layers, wherein at least one CMOS ultrasonic transducer of the plurality of CMOS ultrasonic transducers is disposed above the metal layer such that the metal layer is between the silicon substrate and the at least one CMOS ultrasonic transducer; and CMOS control circuitry formed in the silicon substrate, coupled to the plurality of CMOS ultrasonic transducers by at least one conductive via passing through the insulating layer of the plurality of insulating layers and configured to control the plurality of CMOS ultrasonic transducers to support one-dimensional (1D), two-dimensional (2D), and three-dimensional (3D) ultrasound imaging, wherein the CMOS control circuitry comprises a waveform generator coupled to the at least one CMOS ultrasonic transducer of the plurality of CMOS ultrasonic transducers through a pulser, the waveform generator configurable to generate an impulse, a continuous wave, a coded excitation, and a chirp waveform; wherein the waveform generator comprises a plurality of registers, wherein the plurality of registers comprises a register storing a value of an initial phase, a register storing a value of an initial frequency, and a register storing a value of a frequency rate of change; and wherein the waveform generator further comprises a plurality of comparators and a plurality of multiplexers, wherein outputs of the plurality of registers are coupled to inputs to the plurality of comparators, and wherein outputs of the plurality of comparators are coupled to inputs of the multiplexers, an output of a first multiplexer of the plurality of multiplexers being a first input to the pulser, and an output of a second multiplexer of the plurality of multiplexers being a second input to the pulser.
地址 Guilford CT US