发明名称 |
Semiconductor device with improved electrode isolation |
摘要 |
A floating gate insulating film is formed in a first element formation region of a substrate. A first insulating film and a control gate electrode are continuously formed from the first element formation region to a first element isolation film. A selection gate insulating film and a selection gate electrode are formed in the substrate located in the first element formation region. The selection gate electrode is continuously formed over the first element isolation film. A side surface of the selection gate electrode is in contact with a first side surface of a floating gate electrode through a second insulating film. An upper surface of a region overlapping with the selection gate electrode in the first element isolation film is located lower than an upper surface of the substrate. |
申请公布号 |
US9356032(B2) |
申请公布日期 |
2016.05.31 |
申请号 |
US201514737148 |
申请日期 |
2015.06.11 |
申请人 |
RENESAS ELECTRONICS CORPORATION |
发明人 |
Mizushima Hiroaki |
分类号 |
H01L27/115;H01L29/423;H01L21/28;H01L29/788 |
主分类号 |
H01L27/115 |
代理机构 |
McDermott Will & Emery LLP |
代理人 |
McDermott Will & Emery LLP |
主权项 |
1. A semiconductor device comprising:
a substrate; a first element isolation film which is formed in the substrate and is located adjacent to a first element formation region of the substrate; a floating gate insulating film formed over the substrate located in the first element formation region; a floating gate electrode formed over the floating gate insulating film; a control gate electrode formed over the floating gate electrode via a first insulating film; a selection gate insulating film which is formed over the substrate located in the first element formation region and is located adjacent to the floating gate insulating film; a selection gate electrode which is continuously formed over the selection gate insulating film and the first element isolation film and whose side surface is in contact with a first side surface of the floating gate electrode through a second insulating film; and an erase gate electrode that is in contact with a second side surface of the floating gate electrode through a third insulating film, wherein a first upper surface, which is an upper surface of a region overlapping with the selection gate electrode in the first element isolation film, is located lower than an upper surface of the substrate. |
地址 |
Tokyo JP |