| 发明名称 | Method and apparatus of a three dimensional integrated circuit | ||
| 摘要 | An apparatus includes a first tier and a second tier. The second tier is above the first tier. The first tier includes a first cell. The second tier includes a second cell and a third cell. The third cell includes a first ILV to couple the first cell in the first tier to the second cell in the second tier. The third cell further includes a second ILV, the first ILV and the second ILV are extended along a first direction. The first tier further includes a fourth cell. The second tier further includes a fifth cell. The second ILV of the third cell is arranged to connect the fourth cell of the first tier with the fifth cell of the second tier. In some embodiments, the second tier further includes a spare cell including a spare ILV for ECO purpose. | ||
| 申请公布号 | US9355205(B2) | 申请公布日期 | 2016.05.31 |
| 申请号 | US201314137679 | 申请日期 | 2013.12.20 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Chang Chi-Wen;Lee Hui Yu;Liu Ya Yun;Kuan Jui-Feng;Cheng Yi-Kan |
| 分类号 | G06F17/50;H01L23/48;H01L25/065 | 主分类号 | G06F17/50 |
| 代理机构 | Slater Matsil, LLP | 代理人 | Slater Matsil, LLP |
| 主权项 | 1. A standard cell, comprising: a first tier including a first cell; and a second tier including a second cell and a third cell; wherein the second tier is above the first tier; andthe third cell includes a first inter layer via (ILV) to couple the first cell in the first tier to the second cell in the second tier, the first ILV including a first port connected to the first cell and a second port connected to the second cell. | ||
| 地址 | Hsin-Chu TW | ||