| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device, which restrains a breakdown of a low-voltage transistor included in a bit line selecting circuit.SOLUTION: A NAND string unit NU and transistors BLSe, BLSo, BIASe, BIASo included in a bit line selecting circuit are formed in a P-well. The transistors BLSe, BLSo, BIASe, BIASo are set in a floating state during an erasing operation. The voltages of the transistors BLSe, BLSo, BIASe, BIASo are increased when an erasing voltage is applied to the P-well. When the erasing voltage is discharged from the P-well, the gates of the transistors BLSe, BLSo, BIASe, BIASo are connected to a reference potential via a discharging circuit 410, and the gate voltage is discharged to follow the voltage of the P-well.SELECTED DRAWING: Figure 8 |
