| 摘要 |
Provided is a technology for accurately operating a delay circuit while reducing an area of the delay circuit by using a division clock. The delay circuit comprises: a micro-timing measurement unit for measuring micro-timing information on whether an input signal responds to any one among an even clock timing and an odd clock timing based on a clock; a large delay unit for outputting the input signal in which the micro-timing is measured by the micro-timing measurement unit by synchronizing with the division clock; and a micro-timing application unit for applying the micro-timing information to an output signal of the large delay unit. |
