METHODOLOGY AND STRUCTURE FOR FIELD PLATE DESIGN

摘要

The present disclosure relates to a high voltage transistor device having a field plate, and a method of formation. In some embodiments, the high voltage transistor device has a gate electrode disposed over a substrate between a source region and a drain region located within the substrate. A dielectric layer laterally extends from over the gate electrode to a drift region arranged between the gate electrode and the drain region. A field plate is located within a first inter-level dielectric layer overlying the substrate. The field plate laterally extends from over the gate electrode to over the drift region and vertically extends from the dielectric layer to a top surface of the first ILD layer. A plurality of metal contacts, having a same material as the field plate, vertically extend from a bottom surface of the first ILD layer to a top surface of the first ILD layer.

主权项

1. An integrated chip, comprising:
a gate electrode disposed over a substrate between a source region and a drain region; one or more dielectric layers laterally extending from over the gate electrode to over a drift region laterally arranged between the gate electrode and the drain region; a field plate located within a first inter-level dielectric (ILD) layer overlying the substrate, wherein the field plate laterally extends from over the gate electrode to over the drift region and vertically extends from the one or more dielectric layers to a top surface of the first ILD layer; and a plurality of metal contacts surrounded by the first ILD layer, wherein the plurality of metal contacts comprise a same material as the field plate.