| 发明名称 |
MEMORY TIMING CIRCUIT |
| 摘要 |
A memory circuit including a memory cell configured to provide a charge, voltage, or current to an associated bit-line; a sense amplifier configured to sense the charge, voltage, or current on the bit-line; a word-line circuit configured to control a word-line of the memory cell; and a tracking circuit configured to track one or more conditions of the memory circuit and provide a timing control signal at an output operative to adaptively control the word-line circuit. |
| 申请公布号 |
US2016148662(A1) |
申请公布日期 |
2016.05.26 |
| 申请号 |
US201615013605 |
申请日期 |
2016.02.02 |
| 申请人 |
InfineonTechnologies AG |
发明人 |
Jefremow Mihail;Backhausen Ulrich;Kern Thomas |
| 分类号 |
G11C7/22;G11C7/12;G11C7/06 |
主分类号 |
G11C7/22 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory circuit, comprising:
a memory cell configured to provide a charge, voltage, or current to an associated bit-line; a sense amplifier configured to sense the charge, voltage, or current on the bit-line; a word-line circuit configured to control a word-line of the memory cell; a bit-line circuit having at least one of (i) a bit-line voltage control circuit and (ii) a mux circuit; and a tracking circuit configured to track one or more conditions of the memory circuit and provide a timing control signal at an output operative to adaptively control at least one of: (i) the word-line circuit, and (ii) bit-line circuit. |
| 地址 |
Neubiberg DE |
