发明名称 NESTED CACHE COHERENCY PROTOCOL IN A TIERED MULTI-NODE COMPUTER SYSTEM
摘要 A computer system comprising multiple nodes, each node comprising a plurality of processors and a local cache hierarchy, suppresses local cache coherency of a node operations or global cache coherency operations between nodes based on the coherency request being a global or local request, and the state of the cache line at the node.
申请公布号 US2016147659(A1) 申请公布日期 2016.05.26
申请号 US201414549429 申请日期 2014.11.20
申请人 Drapala Garrett Michael;Lewis William J;Mak Pak-kin;Sonnelitter, III Robert J 发明人 Drapala Garrett Michael;Lewis William J;Mak Pak-kin;Sonnelitter, III Robert J
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项 1. A computer system for providing cache coherency in a processor system comprising a plurality of nodes, each node comprising a respective plurality of processors and a respective cache system, the processor system configured to perform a multi-tiered cache coherency protocol, the multi-tiered cache coherency protocol comprising local cache coherency operations within a node, and global cache coherency operations between nodes, the computer system comprising: a node comprising a plurality of processors and a local cache, the node configured to perform a method, said method comprising: based on receiving a coherency request for a cache line, determining, by the node, which multi-tiered cache coherency operation to perform; andbased on the coherency state of the cache line at the node and the request being from the same node or another node, supporting, by the node, cache coherency for the cache line by suppressing any one of a local cache coherency operation or a global cache coherency operation.
地址 Cary NC US