| 摘要 |
A computer device including a node having a storage device having a plurality of first internal address spaces, a cache memory, and a processor may be provided. The processor may provide a virtual volume. The virtual volume may have a plurality of virtual address spaces including first virtual address spaces corresponding to the plurality of first internal address spaces. The processor may cache data of a virtual address space in a first cache space of the cache memory by associating the virtual address space with the first cache space. Further, the processor may cache data of a first internal address space of the first internal address spaces in a second cache space of the cache memory by associating the first internal address space with the second cache space. |
